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| Preliminary Information T73LVP20 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator Applications * LVPECL clock source General Description The TLSI T73LVP20 is a general-purpose LVTTL/LVCMOS-to-differential LVPECL translator operating from a single +3.3V supply. The device accepts an LVTTL or LVCMOS input and provides differential LVPECL outputs referenced to the positive supply rail. Both the tiny 6-pin SOT and 8-pin SOIC packages make it ideal for applications which require the translation of a clock or a data signal, and where cost, performance and size are of critical importance. The T73LVP20 is 100K PECL compatible and is a pin-forpin replacement for the MC100EPT20D (8-pin SOIC only). Features * * * * * 350pS typical propagation delay Operating Frequency > 1 GHz Differential LVPECL outputs Flow-through pinout Q output defaults low with input (D) open * * * ESD rating >2000V (Human Body Model) or >200V (Machine Model) -40 oC to +85 oC operating temperature range Available as die, in tiny 6-pin SOT or standard 8-pin SOIC packages Figure 1. Functional Block Diagrams & Pin Assignments (Top View) See pages 4 & 5 for package outline drawings and ordering information. T73LVP20PI Page 1 Rev A February 23, 2004 TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 * (631) 755-7005 * Fax 631-755-7626 * www.tlsi.com T73LVP20 Preliminary Information Table 1. Pin Description Name NC Q Qn VDD D GND Legend: Description No Connection PECL data output PECL complementary data output Connect to +3.3V LVTTL/LVCMOS data input Connect to ground I = Input O = Output P = Power supply connection Type O O P I P 8-SOIC Pin # 1, 4, 6 2 3 8 7 5 6-SOT Pin # 4 6 5 1 3 2 Table 2. Absolute Maximum Ratings Symbol VDD VIN IOUT TSTG Parameter Supply voltage Input voltage Output current Storage temperature Conditions Referenced to GND Referenced to GND Continuous -65 -0.5 Min Typ Max +5.0 VDD 50 +150 Units V V mA o C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Table 3. Operating Conditions Symbol VDD TA VIH VIL Parameter Power Supply Voltage Ambient Temperature Input HIGH Voltage Input LOW Voltage Conditions Min +3.0 -40 +2.0 +0.8 Typ +3.3 Max +3.6 +85 Units V o C V V T73LVP20PI Page 2 Rev A February 23, 2004 TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 * (631) 755-7005 * Fax 631-755-7626 * www.tlsi.com T73LVP20 Preliminary Information Table 4. DC Characteristics TA = -40oC to +85oC, VDD = +3.0V to +3.6V unless otherwise stated below. Symbol IIH IIL VIK VOH Parameter Input HIGH Current Input LOW Current Input Clamp Diode Voltage Output HIGH Voltage (1, 2) o o Conditions VIN =+2.7V VIN = +0.5V IIN = -18mA -40 C +25 C +85oC (1, 2) o Min Typ Max 100 1 -1.2 Units A A V mV mV mV mV mV mV mA VDD = +3.3V 2220 2220 2220 2320 2320 2320 1520 1520 1520 23 2420 2420 2420 1620 1620 1620 VOL Output LOW Voltage -40 C +25 C +85oC o VDD = +3.3V 1420 1420 1420 IDD Notes: Power Supply Current No Load 1. The T73LVP20 is designed to meet these specifications after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board. 2. Q and Qn outputs are loaded with 50 ohms to VDD-2 volts. Table 5. AC Characteristics TA = -40oC to +85oC, VDD = +3.0V to +3.6V Symbol tPLH tPHL tr/tf fMAX fMAX Parameter Propagation Delay Propagation Delay (1) (1) Conditions To Output Differential To Output Differential 20%-80%, Q, Qn LVTTL or LVCMOS input 750mV peak-to-peak sine wave centered around 1.5V Min Typ 350 350 Max 500 500 200 Units ps ps ps GHz GHz Output Rise/Fall time Maximum Input Frequency Maximum Input Frequency (2) 80 130 >1 >1 Notes: 1. Q and Qn outputs are loaded with 50 ohms to VDD-2 volts. 2. Measured using a 750mV peak-to-peak, 50% duty cycle clock source. T73LVP20PI Page 3 Rev A February 23, 2004 TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 * (631) 755-7005 * Fax 631-755-7626 * www.tlsi.com T73LVP20 Preliminary Information Figure 2. Package Outline (8-pin SOIC) T73LVP20PI Page 4 Rev A February 23, 2004 TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 * (631) 755-7005 * Fax 631-755-7626 * www.tlsi.com T73LVP20 Preliminary Information Figure 3. Package Outline (6-pin SOT) Table 6. Ordering Information Part Number T73LVP20-S08 T73LVP20-S08-TNR T73LVP20-SOT T73LVP20-SOT-TNR T73LVP20-DIE Marking T73LVP20 T73LVP20 LVP20 LVP20 N/A Shipping/Packaging Tubes Tape & Reel Tubes Tape & Reel Dice No. of Pins 8 8 6 6 6 Package SOIC SOIC SOT SOT N/A Temperature -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C T73LVP20PI Page 5 Rev A February 23, 2004 TLSI Incorporated, 770 Park Avenue, Huntington NY 11743 * (631) 755-7005 * Fax 631-755-7626 * www.tlsi.com |
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